I am an assistant professor in the Department of Computer and Electrical Engineering at the University of Cantabria. I received my PhD (2014) from the same University studying Computer Architecture. I was co-advised by Valentín Puente and Jose Angel Gregorio. I received my BS and MS in Telecommunication Engineer from the University of Cantabria in 2005.
Currently, my teaching activity involves two different undergraduate courses from two different degrees, being the main lecturer in one of them.
My research interest focus on the Memory Hierarchy for Chip Multiprocessors (CMP). I have been working on different parts of the Memory Hierarchy, such as cache hierarchy, on-chip interconnection network, coherence protocol and memory scheduling. Currently I am exploring architectural solutions to emerging technologies applied to emerging applications. I have also special interest on simulation tools and performance evaluation methodologies.
I have been involved in many different courses during the last years. This is a resume of my teaching activity: