Publications

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2026

  • Design Tradeoffs in Backend Organization in Out-Of-Order RISC-V Processors.

    Esther Alonso, Pablo Prieto, Pablo Abad, Valentin Puente , Symposium on Parallelism in Algorithms and Architectures, (SPAA)

    Details Pdf Code

    #CPU#RISCV

  • Hardware support in RISC-V for ternary LLMs

    Sergio Martinez, David Ahedo, Pablo Prieto, Pablo Abad, Valentin Puente , RISC-V Summit Europe, (RISCV)

    Details Pdf

    #machineLearn#FPGA#RISCV

2025

  • Edge Deployment of Small Language Models, a comprehensive comparison of CPU, GPU and NPU backends

    Pablo Prieto, Pablo Abad , ArXiv, (ArXiv)

    Details Pdf Arxiv

    #machineLearn#performance#FPGA

  • Efficient Server Consolidation through a balanced mix of Transformer-based and Conventional Applications.

    Pablo Prieto, Pablo Abad, Jose Angel Gregorio, Valentin Puente , International Conference on Supercomputing, (ICS)

    Details Pdf Code DOI

    #machineLearn#CPU

2024

  • Architecture of a Cortex Inspired Hierarchical Event Recaller

    Valentin Puente , ArXiv, (ArXiv)

    Details Pdf Arxiv

    #neuroInspired#machineLearn

2023

  • Performance Characterization of Popular DNN Models on Out-of-Order CPUs.

    Pablo Prieto, Pablo Abad Fidalgo, Valentin Puente, Jose Angel Gregorio , International Conference on Parallel Architectures and Compilation Techniques, (PACT)

    Details Pdf Code DOI

    #machineLearn#performance#CPU

2022

  • Top-Down Performance Profiling on NVIDIA's GPUs.

    Alvaro Saiz, Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente , International Conference on Parallel and Distributed Processing, (IPDPS)

    Details Pdf Code DOI

    #GPU

2021

  • Fast, Accurate Processor Evaluation through Heterogeneous, Sample-based Benchmarking

    Pablo Prieto, Pablo Abad, Jose Angel Gregorio, Valentin Puente , IEEE Transactions on Parallel and Distributed Systems, (TPDS)

    Details Pdf Code DOI

    #performance

2020

  • Rainbow: A composable coherence protocol for multi‐chip servers

    Lucia G. Menezo, Valentin Puente, Pablo Abad, Jose Angel Gregorio , Concurrency and Computation: Practice and Experience, (CPE)

    Details Pdf Slicc DOI

    #coherence

  • SPECcast: A Methodology for Fast Performance Evaluation with SPEC CPU 2017 MultiprogrammedWorkloads

    Pablo Prieto, Pablo Abad, Jose Angel Herrero, Jose Angel Gregorio, Valentin Puente , International Conference on Parallel Processing, (ICPP)

    Details Pdf Video Code DOI

    #performance

  • The gem5 Simulator: Version 20.0+

    Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian , Arxiv, (Arxiv)

    Details Pdf Code Arxiv

    #simulation

2019

  • CLAASIC: a Cortex-Inspired Hardware Accelerator

    Valentin Puente, Jose Angel Gregorio , Accepted Journal of Parallel and Distributed Computing, (JPDC)

    Details Pdf Patent Project DOI

    #neuroInspired#machineLearn

  • Architecting Racetrack Memory preshift through pattern-based prediction mechanisms

    Adrian Colaso, Pablo Prieto, Pablo Abad, Valentin Puente, Jose Angel Gregorio , International Symposium on Parallel and Distributed Computing, (IPDPS)

    Details Pdf DOI

    #technology

  • Accuracy vs. Computational Cost Tradeoff in Distributed Computer System Simulation

    Adrian Colaso, Pablo Prieto, Jose Angel Herrero, Pablo Abad , arxiv.org, (ARXIV)

    Details Pdf Arxiv

    #simulation

2018

  • Mosaic: A Scalable Coherence Protocol

    Lucia G. Menezo, Valentin Puente, Pablo Abad, Jose Angel Gregorio , International Journal of Parallel Programming, (IJPP)

    Details Pdf Slicc DOI

    #coherence

  • Memory Hierarchy Characterization of NoSQL Applications through Full-system Simulation

    Adrian Colaso, Pablo Prieto, Jose Angel Herrero, Pablo Abad, Lucia G. Menezo, Valentin Puente, Jose Angel Gregorio , Transactions on Parallel and Distributed Systems, IEEE., (TPDS)

    Details Pdf DOI

    #performance

2017

  • An adaptive cache coherence protocol: trading storage for traffic

    Lucia G. Menezo, Valentin Puente, Jose Angel Gregorio , Journal of Parallel and Distributed Systems, (JPDC)

    Details Pdf DOI

    #coherence

2016

  • Energy Minimization at All Layers of the Data Center: The ParaDIME Project

    Oscar Palomar, Santhosh Kumar Rethinagiri, Gulay Yalcin, Ruben Titos-Gil, Pablo Prieto, Emma Torrella, Osma Unsal, Adrian Cristal, Pascal Felber, Anita Sobe, Yaroslav Hayduk, Mascha Kurpicz, Christof Fetzer, Thomas Knauth, Malte SCHNEEGAß, Jens STRUCKMEIER, Dragomir Milojevic , Conference on Design, Automation and Test in Europe., (DATE)

    Details Pdf DOI

    #CMP

2015

  • ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers

    Santhosh Kumar Rethinagiri, Oscar Palomar, Anita Sobe, Gulay Yalcin, Thomas Knauth, Rubén Titos Gil, Pablo Prieto, Malte Schneegaß, Adrian Cristal, Osman Unsal, Pascal Felber, Christof Fetzer, Dragomir Milojevic , Microprocessors and Microsystems., (Micpro)

    Details Pdf DOI

    #technology

  • AC-WAR: Architecting the Cache Hierarchy to Improve the Lifetime of an Non-volatile Endurance-limited Main Memory

    Pablo Abad, Pablo Prieto, Valentin Puente, Jose Angel Gregorio , Transactions on Parallel and Distributed Systems, IEEE., (TPDS)

    Details Project DOI

    #cache#technology

  • Flask Coherence: A Morphable Hybrid Coherence Protocol to Balance Energy, Performance and Scalability

    Lucia G. Menezo, Valentin Puente, Jose Angel Gregorio , In International Symposium On High Performance Computer Architecture, IEEE., (HPCA)

    Details Pdf Slides Project DOI

    #coherence

  • Improving Last Level Shared Cache Performance through Mobile Insertion Policies (MIP)

    Pablo Abad, Pablo Prieto, Valentin Puente, Jose Angel Gregorio , Parallel Computing Journal, Elsevier., (ParCo)

    Details Pdf Project DOI

    #cache

2014

  • 3D Stacking of High-Performance Processors

    Philip Emma, Alper Buyuktosunoglu, Michael Healy, Krishnan Kailas, Valentin Puente, Roy Yu, Allan Hartstein, Pradip Bose, Jaime Moreno , In International Symposium On High Performance Computer Architecture, IEEE., (HPCA)

    Details Pdf DOI

    #technology#CPU

2013

  • CMP Off-chip Bandwidth Scheduling Guided by Instruction Criticality

    Pablo Prieto, Valentin Puente, Jose Angel Gregorio , International Conference on Supercomputing., (ICS)

    Details Pdf DOI

    #cache#CPU

  • Interaction of NoC design and Coherence Protocol in 3D-stacked CMPs

    Pablo Abad, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, Jose Angel Gregorio , 16th Euromicro Conference on Digital System Design, (DSD)

    Details Pdf Slides DOI

    #coherence#technology#interconnects

  • LIGERO: A Light but Efficient Router Conceived for Cache Coherent Chip Multi Processors

    Pablo Abad, Valentin Puente, Jose Angel Gregorio , ACM Transactions on Architecture and Code Optimization, (TACO)

    Details Pdf Slides Patent DOI

    #interconnect

  • The Case for a Scalable Coherence Protocol forComplex On-Chip Cache Hierarchies in Many-CoreSystems

    Lucia G. Menezo, Valentin Puente, Jose Angel Gregorio , Parallel Architecture and Compilation Techniques, (PACT)

    Details Pdf Slides Slicc

    #coherence

2012

  • Adaptive-Tree Multicast: Efficient Multidestination Support for CMP Communication Substrate

    Pablo Abad, Pablo Prieto, Lucia G. Menezo, Valentin Puente, Jose Angel Gregorio , IEEE Transactions on Parallel and Distributed Systems, (TPDS)

    Details Pdf DOI

    #interconnect#CMP

  • Balancing Performance and Cost in CMP Interconnection Networks

    Pablo Abad, Valentin Puente, Jose Angel Gregorio , IEEE Transactions on Parallel and Distributed Systems, (TPDS)

    Details Pdf Slides DOI

    #interconnect#CMP

  • BIXBAR: A Low Cost Solution to Support Dynamic Link Reconfiguration in Networks on Chip

    Pablo Abad, Pablo Prieto, Valentin Puente, Jose Angel Gregorio , IEEE International Conference on Computer Design, (ICCD)

    Details Pdf Slides DOI

    #interconnect#CMP

  • Improving Coherence Protocol Reactiveness by Trading Bandwidth for Latency

    Lucia G. Menezo, Valentin Puente, Jose Angel Gregorio , Computing Frontiers, (CF)

    Details Pdf DOI

    #coherence

  • TOPAZ: An Open-Source Interconnection Network Simulator for Chip Multiprocessors and Supercomputers

    Pablo Abad, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, Jose Angel Gregorio , International Symposium on Networks-on-chip, (NOCS)

    Details Pdf Slides DOI

    #simulation

2011

  • Multilevel Cache Modeling for Chip-Multiprocessor Systems

    Pablo Prieto, Valentin Puente, Jose Angel Gregorio , Computer Architecture Letters, IEEE., (CAL)

    Details Pdf DOI

    #cache#performance

2010

  • The Necessity for Hardware QoS Support for Server Consolidation and Cloud Computing

    Javier Merino, Valentin Puente, Jose Angel Gregorio , arxiv.org, (ARXIV)

    Details Pdf Arxiv

    #performance

  • ESP-NUCA: A low-cost adaptive Non-Uniform Cache Architectures

    Javier Merino, Valentin Puente, Jose Angel Gregorio , International Conference on High Performance Computer Architecture, (HPCA)

    Details Pdf DOI

    #cache#CMP

  • Impact of Interconnection Network Resources on CMP Performance

    Pablo Abad, Pablo Prieto, Lucia G. Menezo, Valentin Puente , International Worshop on Interconnection Network Architectures: On-Chip, Multi-Chip, (INA-OCMC)

    Details Pdf Slides

    #CMP#interconnect

2009

  • MRR: Enabling Fully Adaptive Multicast Routing for CMP Interconnection Networks

    Pablo Abad, Valentin Puente, Jose Angel Gregorio , International Conference on High Performance Computer Architecture, (HPCA)

    Details Pdf Slides DOI

    #interconnect#CMP

  • Topology-aware CMP design

    Pablo Prieto, Valentin Puente, Jose Angel Gregorio , Interconnection Network Architectures: On-Chip, Multi-Chip., (INA-OCMC)

    Details Pdf

    #interconnect

2008

  • SP-NUCA: a cost effective dynamic non-uniform cache architecture

    Javier Merino, Valentin Puente, Pablo Prieto, Jose Angel Gregorio , Computer Architecture News, ACM SIGARCH., (CAN)

    Details Pdf DOI

    #cache

  • Reducing the Interconnection Network Cost of Chip Multiprocessors

    Pablo Abad, Valentin Puente, Jose Angel Gregorio , International Network on Chip Symposium, (NOCS)

    Details Pdf Slides DOI

    #coherence

2007

  • Rotary Router: an Efficient Architecture for CMP Interconnection Networks

    Pablo Abad, Valentin Puente, Jose Angel Gregorio, Pablo Prieto , International Symposium on Computer Architecture, (ISCA)

    Details Pdf Patent DOI

    #interconnect

2006

  • High-performance adaptive routing for networks with arbitrary topology

    Valentin Puente, Jose Angel Gregorio , Journal on System Architecture, (JSA)

    Details Pdf DOI

    #interconnect

2004

  • Immunet: A Cheap and Robust Fault-Tolerant Packet Routing Mechanism

    Valentin Puente, Jose Angel Gregorio , International Symposium on Computer Architecture, (ISCA)

    Details Pdf Patent DOI

    #interconnect

  • A First Glance at Kilo-instruction Based Multiprocessors

    Marco Galluzi, Valentin Puente, Adrian Cristal, Mateo Valero, Jose Angel Gregorio, Fernando Vallejo, Ramón Beivide , Computing Frontiers, (CF)

    Details Pdf DOI

    #CPU

  • Evaluating Kilo-instruction Multiprocessors

    Marco Galluzi, Valentin Puente, Adrian Cristal, Mateo Valero, Jose Angel Gregorio, Fernando Vallejo, Ramón Beivide , Workshop on Memory Performance Issues, (WMPI)

    Details Pdf DOI

    #CPU

  • Load Unbalance in k-ary n-Cube Networks

    José Miguel-Alonso, Valentin Puente, Jose Angel Gregorio, Fernando Vallejo, Ramón Beivide , International Conference on Parallel Processing, (Euro-Par)

    Details Pdf DOI

    #performance

  • Simulation Methodology for Decision Support Workloads

    Luis Amigo, Valentin Puente, Jose Angel Gregorio , Euromicro Workshop on Parallel and Distributed Processing, (PDP)

    Details Pdf DOI

    #simulation#performance

2003

  • A Low Cost Fault Tolerant Packet Routing for Parallel Computers

    Valentin Puente, Jose Angel Gregorio, Ramon Beivide , International Parallel & Distributed Processing Symposium, (IPDPS)

    Details Pdf DOI

    #interconnect

  • On the Design of a High-Performance Adaptive Router for CC-NUMA Multiprocessors

    Valentin Puente, Jose Angel Gregorio, RamÛn Beivide, Cruz Izu , Transactions on Parallel and Distributed Systems, IEEE., (TPDS)

    Details Pdf DOI

    #interconnect

2002

  • SICOSYS: An Integrated Framework for studying Interconnection Network Performance in Multiprocessor Systems

    Valentin Puente, Jose Angel Gregorio, Ramon Beivide , Euromicro Workshop on Parallel and Distributed Processing, (PDP)

    Details Pdf DOI

    #simulation

2001

  • A New Communication Mechanism for Cluster Computing.

    Valentin Puente, José A. Gregorio, Ramón Beivide, Fernando Vallejo, Andres Ibañez , Euro-par, (Europar)

    Details Pdf DOI

    #interconnect

  • A new routing mechanism for networks with irregular topology.

    Valentin Puente, José A. Gregorio, Ramón Beivide, Fernando Vallejo, Andres Ibañez , Supercomputing, (SC)

    Details Pdf DOI

    #interconnect

  • The Adaptive Bubble Router

    Valentin Puente, Jose Angel Gregorio , International Conference on Parallel Processing, (ICPP)

    Details Pdf DOI

    #interconnect

2000

  • Improving parallel system performance by changing the arrangement of the network links

    Valentin Puente, Jose Angel Gregorio , International Conference on Supercomputing, (ICS)

    Details Pdf DOI

    #interconnect

  • A Case Study of Trace-driven Simulation for Analyzing Interconnection Networks: cc-NUMAs with ILP Processors

    Valentin Puente, Jose Angel Gregorio , Euromicro Workshop on Parallel and Distributed Processing, (PDP)

    Details Pdf DOI

    #simulation

1999

  • Impact of the Head-of-Line Blocking on Parallel Computer Networks: Hardware to Applications

    Valentin Puente, Jose Angel Gregorio , International Conference on Parallel Processing, (Euro-Par)

    Details Pdf DOI

    #interconnect

  • Adaptive Bubble Router: A Design to Improve Performance in Torus Networks

    Valentin Puente, Jose Angel Gregorio , International Conference on Parallel Processing, (ICPP)

    Details Pdf DOI

    #interconnect

  • Low-level router design and its impact on supercomputer system performance

    Valentin Puente, Jose Angel Gregorio , International Conference on Supercomputing, (ICS)

    Details Pdf DOI

    #interconnects

Disclaimer
Please note that papers linked here represent author preprints. The official, published version must be obtained from the publisher's website or the published print copy. This material is presented here to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders.